MEDIUM 4.2

CVE-2026-10644: Zephyr SERCOM-G1 UART Out-of-Bounds Write on PIC32CM-JH

A flaw in Microchip's SERCOM-G1 UART driver for PIC32CM-JH microcontrollers causes a one-byte memory write immediately after a receive buffer when asynchronous DMA reception is enabled with a minimal buffer size. An attacker with access to the serial interface can supply data that overwrites one byte in adjacent memory, potentially crashing the device or causing localized corruption. The vulnerability requires specific configuration (async UART mode and single-byte buffer usage) that is not enabled by default, limiting its immediate risk in most deployments.

Source data · NVD / CISA · public domain

CVSS
3.1 · 4.2 MEDIUM · CVSS:3.1/AV:A/AC:H/PR:N/UI:N/S:U/C:N/I:L/A:L
Weaknesses (CWE)
CWE-787
Affected products
1 configuration(s)
Published / Modified
2026-06-28 / 2026-07-14

NVD description (verbatim)

The Microchip SERCOM-G1 UART driver (drivers/serial/uart_mchp_sercom_g1.c), used by the PIC32CM-JH SoC family, contains an out-of-bounds write in its asynchronous (DMA) receive path. When uart_rx_enable() is invoked with a one-byte receive buffer (len == 1) and CONFIG_UART_MCHP_ASYNC is enabled, the RX-complete ISR starts a single-beat DMA transfer while a received byte is already pending in the SERCOM DATA register. On this SoC the peripheral-triggered DMA start sequencing then writes one byte past the end of the caller-supplied buffer (CWE-787). The overflowed byte's value is the UART RX data supplied by the connected serial peer (adjacent attacker), while its size and location are fixed at one byte immediately after the buffer. Exploitation requires the async UART config (not enabled by default on the in-tree PIC32CM-JH boards) and a consumer that enables RX with a one-byte buffer; impact is limited single-byte memory corruption adjacent to the RX buffer (possible crash / denial of service). The defect shipped in v4.4.0. The fix reads the first byte with the CPU and, for one-byte buffers, performs no DMA at all; for larger buffers it sizes the DMA for the remaining len-1 bytes.

2 reference(s) · View on NVD →

SEC.co analysis · AI-assisted, reviewed against source

Technical summary

The vulnerability resides in drivers/serial/uart_mchp_sercom_g1.c within the Zephyr RTOS kernel, affecting the PIC32CM-JH SoC family. When uart_rx_enable() is called with a one-byte receive buffer (len == 1) and CONFIG_UART_MCHP_ASYNC is enabled, a race condition occurs: the RX-complete ISR initiates a single-beat DMA transfer while a byte is already pending in the SERCOM DATA register. Due to the peripheral's DMA sequencing on this SoC, the DMA engine writes one byte past the allocated buffer boundary (CWE-787: Out-of-bounds Write). The overflowed byte's value is controlled by the UART data stream from the serial peer. The defect was introduced in Zephyr v4.4.0. The remediation reads the first byte via CPU and either skips DMA entirely for one-byte buffers or adjusts the DMA transfer size to len-1 for larger buffers.

Business impact

For organizations deploying Zephyr-based embedded systems on PIC32CM-JH hardware with asynchronous UART receive enabled, this flaw introduces a denial-of-service and data integrity risk. A local attacker on the serial line can trigger memory corruption that may crash the device or cause unpredictable behavior. Most in-tree reference designs do not enable this configuration by default, so impact is limited to custom implementations that explicitly configure async UART with minimal buffers. The risk is elevated in unattended or safety-critical embedded deployments where device restarts are costly or where adjacent memory corruption could trigger cascading failures.

Affected systems

The Zephyr RTOS project is affected, specifically the SERCOM-G1 UART driver component. Impact is restricted to: (1) Zephyr v4.4.0 and later, (2) PIC32CM-JH SoC family microcontrollers, (3) systems with CONFIG_UART_MCHP_ASYNC enabled, and (4) applications calling uart_rx_enable() with single-byte receive buffers. In-tree reference board configurations do not enable async UART by default, so custom firmware builds with this specific configuration combination are the primary attack surface.

Exploitability

Exploitability is moderate and heavily dependent on application design. An attacker requires: (1) physical or logical access to the UART serial interface, (2) knowledge that the target firmware uses async UART with one-byte buffers (not easily discoverable), and (3) ability to send arbitrary data over the UART. No authentication or elevated privileges are needed. The flaw is not a remote code execution vector; it enables only single-byte memory corruption adjacent to the RX buffer, with impact ranging from no observable effect to denial of service depending on what memory occupies that location. Exploitation is not automated or generally applicable across Zephyr deployments without detailed knowledge of the target's UART configuration.

Remediation

The fix (merged in Zephyr following publication) modifies the RX path to read the first pending byte using the CPU rather than relying on DMA for one-byte buffers. For larger buffers, the DMA transfer is sized to len-1 bytes to prevent overrun. This eliminates the race condition and out-of-bounds write. Organizations should upgrade to the patched Zephyr release; verify against the Zephyr project security advisories for the exact version containing the fix. If immediate patching is not feasible, disable CONFIG_UART_MCHP_ASYNC on affected boards or ensure that uart_rx_enable() is never called with buffers smaller than two bytes.

Patch guidance

Apply the latest Zephyr kernel update that includes the SERCOM-G1 UART fix. Consult the Zephyr project's official release notes and security advisories to identify the patched version. Organizations using Zephyr in production should establish a testing environment to validate the patch against their specific board configuration and UART usage patterns before deploying to devices. If the patch introduces any regression in UART performance or behavior on your platform, report it to the Zephyr security team. For organizations unable to patch immediately, the mitigation is to disable async UART mode (CONFIG_UART_MCHP_ASYNC = n) or refactor code to use buffers larger than one byte.

Detection guidance

Detection of active exploitation is challenging because the vulnerability produces only a single-byte memory corruption. Monitor for unexpected device resets, memory faults, or data corruption logs on PIC32CM-JH-based systems running async UART. Firmware analysis tools can scan Zephyr binaries for uart_rx_enable() calls with hardcoded one-byte buffer sizes to identify at-risk deployments. Enable memory protection or sanitizers (if available on your SoC) to catch out-of-bounds writes at runtime. Code review of custom UART drivers and applications that inherit or mirror the vulnerable pattern is recommended.

Why prioritize this

Despite a CVSS v3.1 base score of 4.2 (Medium), this vulnerability merits attention because: (1) it affects a critical I/O subsystem (UART), (2) it causes memory corruption that can degrade system stability, (3) it requires only adjacent local access (no credentials), and (4) it affects a mature, widely-deployed RTOS (Zephyr) used in industrial, IoT, and automotive embedded systems. However, the narrow scope (PIC32CM-JH only, non-default config, single-byte buffer edge case) and lack of remote exploitability mean it is lower priority than network-facing vulnerabilities or flaws affecting default configurations. Organizations with large Zephyr deployments should patch during routine maintenance windows; others should assess whether they use this specific hardware and configuration combination.

Risk score, explained

The CVSS v3.1 score of 4.2 reflects: Attack Vector Adjacent (A) = local UART access only, Attack Complexity High (H) = specific config and code pattern required, Privileges Required None (N) = no authentication, User Interaction None (N) = automatic upon receipt of crafted serial data, Scope Unchanged (U) = impact confined to the device, Confidentiality None (C:N), Integrity Low (I:L) = single-byte adjacent corruption, Availability Low (A:L) = possible denial of service via memory corruption or crash. The score appropriately downgrades severity because exploitation is not practical across generic Zephyr deployments and impact is limited to localized memory corruption rather than code execution or widespread data loss.

Frequently asked questions

Does this vulnerability affect all Zephyr users?

No. Only Zephyr deployments on PIC32CM-JH hardware with CONFIG_UART_MCHP_ASYNC explicitly enabled and that call uart_rx_enable() with one-byte buffers are affected. In-tree reference boards do not enable async UART by default, so you are likely unaffected unless you have custom firmware that enables this combination.

Can this be exploited remotely over the network?

No. Exploitation requires direct or indirect access to the UART serial interface of the device. It is not a network-facing vulnerability and cannot be triggered by remote attackers without physical or local serial access.

What happens if my firmware calls uart_rx_enable() with larger buffers?

The vulnerability does not occur with buffers larger than one byte in the original flawed code. However, to be certain, update to the patched Zephyr version which correctly handles all buffer sizes and eliminates the race condition entirely.

Is there a workaround if I cannot patch immediately?

Yes. Disable CONFIG_UART_MCHP_ASYNC in your Zephyr build configuration, or refactor your application to never call uart_rx_enable() with buffers smaller than two bytes. Either mitigation eliminates the exploitable code path.

This analysis is provided for informational purposes and is based on the CVE data published as of the source date. No exploit code or weaponized proof-of-concept is provided. Organizations should verify patch availability and compatibility with their specific hardware and software configurations directly with the Zephyr project and Microchip vendor advisories. SEC.co makes no warranty regarding the accuracy or completeness of this analysis and recommends independent security validation of any patches or mitigations before deployment in production environments. Source: NVD (public-domain), retrieved 2026-08-06. Analysis generated by SEC.co (claude-haiku-4-5).